CMOS CIRCUIT DESIGN, LAYOUT, AMD SIMULATION (Record no. 20849)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00512nam a2200157Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 211104s9999 xx 000 0 und d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788126520374 |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | ENGLISH |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.39732 P5 BAK |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
| Barcode | 20849 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | JACOB BAKER |
| 245 #0 - TITLE STATEMENT | |
| Title | CMOS CIRCUIT DESIGN, LAYOUT, AMD SIMULATION |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Date of publication, distribution, etc. | 2005 |
| Name of publisher, distributor, etc. | WILEY INDIA PVT. LTD. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1038 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | SEMICONDUCTOR MEMORY [Bipolar, Metal Oxide-Semiconductor (Mos), Thin-Film Memory, Complimentary Metal Oxide Semiconductor (CMOS) |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books |
| Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price | Full call number | Date last seen | Cost, replacement price | Price effective from | Koha item type | Public note |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Central Library, PSG Institute of Technology and Applied Research | Central Library, PSG Institute of Technology and Applied Research | Shelf No. 478 | 05/11/2021 | 819.00 | 621.39732 P5 BAK | 05/11/2021 | 819.00 | 05/11/2021 | Books | ELECTRONICS AND COMMUNICATION |