CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION
Language: ENGLISH Publication details: WILEY INDIA PVT. LTD. 2005Description: 1038ISBN: 9788126520374Subject(s): SEMICONDUCTOR MEMORY [Bipolar, Metal Oxide-Semiconductor (Mos), Thin-Film Memory, Complimentary Metal Oxide Semiconductor (CMOS)DDC classification: 621.39732 P5 BAK![](/opac-tmpl/bootstrap/itemtypeimg/vokal/Book.png)
Item type | Current library | Call number | Materials specified | Status | Notes | Date due | Barcode |
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Central Library, PSG Institute of Technology and Applied Research | 621.39732 P5 BAK (Browse shelf(Opens below)) | Available | ELECTRONICS AND COMMUNICATION | 10669 | ||
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Central Library, PSG Institute of Technology and Applied Research | 621.39732 P5 BAK (Browse shelf(Opens below)) | Available | ELECTRONICS AND COMMUNICATION | 10670 |
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621.39732 P5 BAK CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION | 621.39732 P5 BAK CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION | 621.39732 P5 BAK CMOS CIRCUIT DESIGN, LAYOUT, AND SIMULATION | 621.39732 P5 BAK CMOS CIRCUIT DESIGN, LAYOUT, AND SIMULATION |
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